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diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c
index 53a3f0c..e1a6217 100644
--- a/firmware/target/arm/as3525/pcm-as3525.c
+++ b/firmware/target/arm/as3525/pcm-as3525.c
@@ -174,144 +174,98 @@ void * pcm_dma_addr(void *addr)
  ** Recording DMA transfer
  **/
 #ifdef HAVE_RECORDING
-#define I2SIN_RECORDING_MASK ( I2SIN_MASK_POER | I2SIN_MASK_PUER | \
-            I2SIN_MASK_POHF | I2SIN_MASK_POAF | I2SIN_MASK_POF )

 static int rec_locked = 0;
-static unsigned int *rec_start_addr;
-static size_t      rec_size;
+static unsigned int *rec_dma_start_addr;
+static size_t rec_dma_size;

 void pcm_rec_lock(void)
 {
-    if(++rec_locked == 1) {
-        int vic_state = disable_irq_save();
-        VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
-        I2SIN_MASK = 0;
-        restore_irq( vic_state );
-    }
+    if(++rec_locked == 1)
+        VIC_INT_EN_CLEAR = INTERRUPT_DMAC;
 }

+
 void pcm_rec_unlock(void)
 {
-    if(--rec_locked == 0) {
-        int vic_state = disable_irq_save();
-        VIC_INT_ENABLE = INTERRUPT_I2SIN;
-        I2SIN_MASK = I2SIN_RECORDING_MASK;
-        restore_irq( vic_state );
-    }
+    if(--rec_locked == 0)
+        VIC_INT_ENABLE = INTERRUPT_DMAC;
 }


-void pcm_record_more(void *start, size_t size)
+static void rec_dma_callback(void);
+static void rec_dma_start(void)
 {
-    rec_start_addr = start;
-    rec_size = size;
-}
+    size_t size = rec_dma_size;
+    if(size > MAX_TRANSFER)
+        size = MAX_TRANSFER;

+    rec_dma_size -= size;
+    rec_dma_start_addr += size;

-void pcm_rec_dma_stop(void)
-{
-    int vic_state = disable_irq_save();
-    VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
-    I2SIN_MASK = 0;
-    restore_irq( vic_state );
-
-    I2SOUT_CONTROL &= ~(1<<5); /* source = i2soutif fifo */
-    CGU_AUDIO &= ~((1<<23)|(1<<11));
-    CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
+    void* addr = rec_dma_start_addr;
+    dma_enable_channel(1, (void*)I2SIN_DATA, addr, DMA_PERI_I2SIN,
+                DMAC_FLOWCTRL_DMAC_PERI_TO_MEM, false, true, size >> 2, DMA_S1,
+                rec_dma_callback);
 }

-
-void INT_I2SIN(void)
+static void rec_dma_callback(void)
 {
-    register int status;
-    register pcm_more_callback_type2 more_ready;
-
-    status = I2SIN_STATUS;
-
-    if ( status & ((1<<6)|(1<<0)) ) /* errors */
-        panicf("i2sin error: 0x%x = %s %s", status,
-            (status & (1<<6)) ? "push" : "",
-            (status & (1<<0)) ? "pop" : ""
-        );
-
-    /* called at half full so it's safe to pull 16 FIFO reads in one chunk */
-    if( rec_size >= 16*4 )
+    register pcm_more_callback_type2 more_ready = pcm_callback_more_ready;
+    if(rec_dma_size || (more_ready && more_ready(0) >= 0))
     {
-        /* unrolled loop */
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-        *rec_start_addr++ = *I2SIN_DATA;
-
-        rec_size -= 16*4; /* 16x4byte reads */
+        rec_dma_start();
     }
-
-    /* read out any odd samples left */
-    while (((I2SIN_RAW_STATUS & (1<<5)) == 0) && rec_size)
+    else
     {
-        /* 14 bits per sample = 1 32 bits word */
-        *rec_start_addr++ = *I2SIN_DATA;
-        rec_size -= 4;
+        /* Finished recording */
+        pcm_rec_dma_stop();
+        pcm_rec_dma_stopped_callback();
     }
+}

-    I2SIN_CLEAR = status;

-    if(!rec_size)
-    {
-        more_ready = pcm_callback_more_ready;
-        if(!more_ready || more_ready(0) < 0)
-        {
-            /* Finished recording */
-            pcm_rec_dma_stop();
-            pcm_rec_dma_stopped_callback();
-        }
-    }
+void pcm_record_more(void *start, size_t size)
+{
+    dump_dcache_range(start, size);
+    rec_dma_start_addr = start;
+    rec_dma_size = size;
+}
+
+
+void pcm_rec_dma_stop(void)
+{
+    dma_disable_channel(1);
+    rec_dma_size = 0;
+    dma_release();
+
+    I2SOUT_CONTROL &= ~(1<<5); /* source = i2soutif fifo */
+    I2SIN_CONTROL &= ~(1<<11);
+    CGU_AUDIO &= ~((1<<23)|(1<<11));
+    CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
 }


 void pcm_rec_dma_start(void *addr, size_t size)
 {
-    rec_start_addr = addr;
-    rec_size = size;
+    rec_dma_start_addr = addr;
+    rec_dma_size = size;

     CGU_PERI |= CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE;
     CGU_AUDIO |= ((1<<23)|(1<<11));

     I2SOUT_CONTROL |= 1<<5; /* source = loopback from i2sin fifo */

-    /* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE,
-     * data valid at positive edge of SCLK */
-    I2SIN_CONTROL = (1<<5) | (1<<2);
-
-    unsigned long tmp;
-    while ( ( I2SIN_RAW_STATUS & ( 1<<5 ) ) == 0 )
-        tmp = *I2SIN_DATA; /* FLUSH FIFO */
-    I2SIN_CLEAR = (1<<6)|(1<<0);    /* push error, pop error */
-    I2SIN_MASK = I2SIN_RECORDING_MASK;
+    /* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE, DMA */
+    I2SIN_CONTROL = (1<<5)|(1<<11);

-    VIC_INT_ENABLE = INTERRUPT_I2SIN;
+    dma_retain();
+    rec_dma_start();
 }


 void pcm_rec_dma_close(void)
 {
-    pcm_rec_dma_stop();
 }


@@ -333,14 +287,8 @@ void pcm_rec_dma_init(void)

 const void * pcm_rec_dma_get_peak_buffer(int *count)
 {
-    const void *peak_buffer;
-
-    pcm_rec_lock();
-    *count = rec_size >> 2;
-    peak_buffer = (const void*)rec_start_addr;
-    pcm_rec_unlock();
-
-    return peak_buffer;
+    *count = rec_dma_size >> 2;
+    return (const void*)rec_dma_start_addr;
 }

 #endif /* HAVE_RECORDING */
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 51fcd97..ce24354 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -457,6 +457,13 @@ void set_cpu_frequency(long frequency)
 {
     int oldstatus = disable_irq_save();

+    invalidate_idcache();
+    asm volatile(
+        "mrc p15, 0, r0, c1, c0  \n"
+        "bic r0, r0, #1          \n"     /* disable mmu */
+        "mcr p15, 0, r0, c1, c0  \n"
+        : : : "r0" );
+
     /* We only have 2 settings */
     cpu_frequency = (frequency == CPUFREQ_MAX) ? frequency : CPUFREQ_NORMAL;

@@ -479,6 +486,8 @@ void set_cpu_frequency(long frequency)
         CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2);
     }

+    enable_mmu();
+
     restore_irq(oldstatus);
 }
 #endif
diff --git a/firmware/target/arm/mmu-arm.S b/firmware/target/arm/mmu-arm.S
index 0119b26..2ffc834 100644
--- a/firmware/target/arm/mmu-arm.S
+++ b/firmware/target/arm/mmu-arm.S
@@ -262,7 +262,6 @@ clean_dcache_range:
     bx      lr                      @
     .size   clean_dcache_range, .-clean_dcache_range

-#if 0 /* unused */
 /*
  * Dump DCache for this range
  * will *NOT* do write back except for buffer edges not on a line boundary
@@ -318,7 +317,6 @@ clean_dcache_range:
     mcr     p15, 0, r0, c7, c10, 4  @ Drain write buffer
     bx      lr                      @
     .size   dump_dcache_range, .-dump_dcache_range
-#endif /* unused function */

 /*
  * Cleans entire DCache