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Index: firmware/target/arm/mmu-arm.S
===================================================================
--- firmware/target/arm/mmu-arm.S	(revision 25583)
+++ firmware/target/arm/mmu-arm.S	(working copy)
@@ -275,6 +275,7 @@
 clean_dcache:
 cpucache_flush:
     @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
+    ldr     r1, =0x03ffff20         @
     mov     r0, #0x00000000         @
 1:  @ clean_start                   @
     mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
@@ -292,8 +293,7 @@
     mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
     add     r0, r0, #0x00000020     @
     mcr     p15, 0, r0, c7, c10, 2  @ Clean entry by index
-    sub     r0, r0, #0x000000e0     @
-    adds    r0, r0, #0x04000000     @ will wrap to zero at loop end
+    adds    r0, r0, r1              @ will wrap to zero at loop end
     bne     1b @ clean_start        @
     mcr     p15, 0, r0, c7, c10, 4  @ Drain write buffer
     bx      lr                      @ 
@@ -310,6 +310,7 @@
     .type       invalidate_dcache, %function
 invalidate_dcache:
     @ Index format: 31:26 = index, 7:5 = segment, remainder = SBZ
+    ldr     r1, =0x03ffff20         @
     mov     r0, #0x00000000         @
 1:  @ inv_start                     @
     mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
@@ -327,8 +328,7 @@
     mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
     add     r0, r0, #0x00000020     @
     mcr     p15, 0, r0, c7, c14, 2  @ Clean and invalidate entry by index
-    sub     r0, r0, #0x000000e0     @
-    adds    r0, r0, #0x04000000     @ will wrap to zero at loop end
+    adds    r0, r0, r1              @ will wrap to zero at loop end
     bne     1b @ inv_start          @
     mcr     p15, 0, r0, c7, c10, 4  @ Drain write buffer
     bx      lr                      @
@@ -346,8 +346,8 @@
     .global     cpucache_invalidate @ Alias
 invalidate_idcache:
 cpucache_invalidate: 
-    mov     r1, lr                  @ save lr to r1, call uses r0 only
+    mov     r2, lr                  @ save lr to r2, call uses r0, r1 only
     bl      invalidate_dcache       @ Clean and invalidate entire DCache
     mcr     p15, 0, r0, c7, c5, 0   @ Invalidate ICache (r0=0 from call)
-    mov     pc, r1                  @
+    mov     pc, r2                  @
     .size   invalidate_idcache, .-invalidate_idcache