Thank you to anyone who has already donated - your generous donations helped make three months of treatment possible.
My brother Nate continues to fight stage IV Hodgkin's lymphoma. He's just 31, with a wife and baby girl. They have no active income (since he's been unable to return to work), no insurance, and cannot afford the treatment he needs. Nate and his family need your help. Please consider a donation, every dollar helps. Thanks.
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diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index feaf06a..295341c 100644 int system_memory_guard(int newmode) #ifdef HAVE_ADJUSTABLE_CPU_FREQ void set_cpu_frequency(long frequency) { +/* XXX : for 24<->240MHz only ! */ +#define SWITCH_STEPS 3 + static const unsigned char dividers[SWITCH_STEPS][2] = { + /* { CGU_PERI divider - 1 , CGU_PROC divider - 1 } */ + /* boosted + * || + * \/ + * unboosted + */ + { 9, 0 }, /* fclk = 240/(0+1) = 240, pclk = 240/(9+1) = 24 */ + { 2, 3 }, /* fclk = 240/(3+1) = 60, pclk = 60/(9+1) = 6, = 60/(2+1) = 20 */ + { 0, 9 }, /* fclk = 240/(9+1) = 24, pclk = 24/(2+1) = 8, = 24/(0+1) = 24 */ + }; + if(frequency == CPUFREQ_MAX) { #ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE void set_cpu_frequency(long frequency) /* AS3525v2 */ int oldstatus = disable_irq_save(); - /* Change PCLK while FCLK is low, so it doesn't go too high */ - CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0 << 2); + int i; + for (i = SWITCH_STEPS - 1; i > 0; --i) + { + /* Start by lowering fclk so that pclk doesn't go faster than 24MHz */ + CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | + (dividers[i][1]<< 2) | + AS3525_FCLK_SEL); - CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | - (AS3525_FCLK_PREDIV << 2) | - AS3525_FCLK_SEL); + CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (dividers[i][0] << 2); + + } restore_irq(oldstatus); #endif /* CONFIG_CPU == AS3525 */ void set_cpu_frequency(long frequency) /* AS3525v2 */ int oldstatus = disable_irq_save(); - CGU_PROC = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) | - (AS3525_FCLK_PREDIV << 2) | - AS3525_FCLK_SEL); + int i; + for (i = 1; i < SWITCH_STEPS; i++) + { + /* Start by lowering pclk so that pclk doesn't go faster than 24MHz */ + CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (dividers[i][0] << 2); - /* Change PCLK after FCLK is low, so it doesn't go too high */ - CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); + CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | + (dividers[i][1]<< 2) | + AS3525_FCLK_SEL); + } restore_irq(oldstatus); #endif /* CONFIG_CPU == AS3525 */ |
