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% diff -u ~/usb-s3c6400x.c usb-nano2g.c|cat  
--- /home/fun/usb-s3c6400x.c	2012-03-21 13:26:59.822972053 -0400
+++ usb-nano2g.c	2012-03-21 17:11:09.195906002 -0400
@@ -21,7 +21,6 @@
 
 #include "config.h"
 #include "usb.h"
-#include "usb-target.h"
 #include "usb_drv.h"
 
 #include "cpu.h"
@@ -31,6 +30,173 @@
 
 #include "usb-s3c6400x.h"
 
+
+#define DPTXFSIZ1   (*((uint32_t volatile*)(OTGBASE + 0x104)))
+#define DPTXFSIZ2   (*((uint32_t volatile*)(OTGBASE + 0x108)))
+#define DPTXFSIZ3   (*((uint32_t volatile*)(OTGBASE + 0x10C)))
+#define DPTXFSIZ4   (*((uint32_t volatile*)(OTGBASE + 0x110)))
+#define DPTXFSIZ5   (*((uint32_t volatile*)(OTGBASE + 0x114)))
+#define DPTXFSIZ6   (*((uint32_t volatile*)(OTGBASE + 0x118)))
+#define DPTXFSIZ7   (*((uint32_t volatile*)(OTGBASE + 0x11C)))
+#define DPTXFSIZ8   (*((uint32_t volatile*)(OTGBASE + 0x120)))
+#define DPTXFSIZ9   (*((uint32_t volatile*)(OTGBASE + 0x124)))
+#define DPTXFSIZ10  (*((uint32_t volatile*)(OTGBASE + 0x128)))
+#define DPTXFSIZ11  (*((uint32_t volatile*)(OTGBASE + 0x12C)))
+#define DPTXFSIZ12  (*((uint32_t volatile*)(OTGBASE + 0x130)))
+#define DPTXFSIZ13  (*((uint32_t volatile*)(OTGBASE + 0x134)))
+#define DPTXFSIZ14  (*((uint32_t volatile*)(OTGBASE + 0x138)))
+#define DPTXFSIZ15  (*((uint32_t volatile*)(OTGBASE + 0x13C)))
+
+#define DIEPINT(x)  (*((uint32_t volatile*)(OTGBASE + 0x908 + 0x20 * (x))))
+#define DIEPTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0x910 + 0x20 * (x))))
+#define DIEPDMA(x)  (*((const void* volatile*)(OTGBASE + 0x914 + 0x20 * (x))))
+#define DIEPCTL0    (*((uint32_t volatile*)(OTGBASE + 0x900)))
+#define DIEPINT0    (*((uint32_t volatile*)(OTGBASE + 0x908)))
+#define DIEPTSIZ0   (*((uint32_t volatile*)(OTGBASE + 0x910)))
+#define DIEPDMA0    (*((const void* volatile*)(OTGBASE + 0x914)))
+#define DIEPCTL1    (*((uint32_t volatile*)(OTGBASE + 0x920)))
+#define DIEPINT1    (*((uint32_t volatile*)(OTGBASE + 0x928)))
+#define DIEPTSIZ1   (*((uint32_t volatile*)(OTGBASE + 0x930)))
+#define DIEPDMA1    (*((const void* volatile*)(OTGBASE + 0x934)))
+#define DIEPCTL2    (*((uint32_t volatile*)(OTGBASE + 0x940)))
+#define DIEPINT2    (*((uint32_t volatile*)(OTGBASE + 0x948)))
+#define DIEPTSIZ2   (*((uint32_t volatile*)(OTGBASE + 0x950)))
+#define DIEPDMA2    (*((const void* volatile*)(OTGBASE + 0x954)))
+#define DIEPCTL3    (*((uint32_t volatile*)(OTGBASE + 0x960)))
+#define DIEPINT3    (*((uint32_t volatile*)(OTGBASE + 0x968)))
+#define DIEPTSIZ3   (*((uint32_t volatile*)(OTGBASE + 0x970)))
+#define DIEPDMA3    (*((const void* volatile*)(OTGBASE + 0x974)))
+#define DIEPCTL4    (*((uint32_t volatile*)(OTGBASE + 0x980)))
+#define DIEPINT4    (*((uint32_t volatile*)(OTGBASE + 0x988)))
+#define DIEPTSIZ4   (*((uint32_t volatile*)(OTGBASE + 0x990)))
+#define DIEPDMA4    (*((const void* volatile*)(OTGBASE + 0x994)))
+#define DIEPCTL5    (*((uint32_t volatile*)(OTGBASE + 0x9A0)))
+#define DIEPINT5    (*((uint32_t volatile*)(OTGBASE + 0x9A8)))
+#define DIEPTSIZ5   (*((uint32_t volatile*)(OTGBASE + 0x9B0)))
+#define DIEPDMA5    (*((const void* volatile*)(OTGBASE + 0x9B4)))
+#define DIEPCTL6    (*((uint32_t volatile*)(OTGBASE + 0x9C0)))
+#define DIEPINT6    (*((uint32_t volatile*)(OTGBASE + 0x9C8)))
+#define DIEPTSIZ6   (*((uint32_t volatile*)(OTGBASE + 0x9D0)))
+#define DIEPDMA6    (*((const void* volatile*)(OTGBASE + 0x9D4)))
+#define DIEPCTL7    (*((uint32_t volatile*)(OTGBASE + 0x9E0)))
+#define DIEPINT7    (*((uint32_t volatile*)(OTGBASE + 0x9E8)))
+#define DIEPTSIZ7   (*((uint32_t volatile*)(OTGBASE + 0x9F0)))
+#define DIEPDMA7    (*((const void* volatile*)(OTGBASE + 0x9F4)))
+#define DIEPCTL8    (*((uint32_t volatile*)(OTGBASE + 0xA00)))
+#define DIEPINT8    (*((uint32_t volatile*)(OTGBASE + 0xA08)))
+#define DIEPTSIZ8   (*((uint32_t volatile*)(OTGBASE + 0xA10)))
+#define DIEPDMA8    (*((const void* volatile*)(OTGBASE + 0xA14)))
+#define DIEPCTL9    (*((uint32_t volatile*)(OTGBASE + 0xA20)))
+#define DIEPINT9    (*((uint32_t volatile*)(OTGBASE + 0xA28)))
+#define DIEPTSIZ9   (*((uint32_t volatile*)(OTGBASE + 0xA30)))
+#define DIEPDMA9    (*((const void* volatile*)(OTGBASE + 0xA34)))
+#define DIEPCTL10   (*((uint32_t volatile*)(OTGBASE + 0xA40)))
+#define DIEPINT10   (*((uint32_t volatile*)(OTGBASE + 0xA48)))
+#define DIEPTSIZ10  (*((uint32_t volatile*)(OTGBASE + 0xA50)))
+#define DIEPDMA10   (*((const void* volatile*)(OTGBASE + 0xA54)))
+#define DIEPCTL11   (*((uint32_t volatile*)(OTGBASE + 0xA60)))
+#define DIEPINT11   (*((uint32_t volatile*)(OTGBASE + 0xA68)))
+#define DIEPTSIZ11  (*((uint32_t volatile*)(OTGBASE + 0xA70)))
+#define DIEPDMA11   (*((const void* volatile*)(OTGBASE + 0xA74)))
+#define DIEPCTL12   (*((uint32_t volatile*)(OTGBASE + 0xA80)))
+#define DIEPINT12   (*((uint32_t volatile*)(OTGBASE + 0xA88)))
+#define DIEPTSIZ12  (*((uint32_t volatile*)(OTGBASE + 0xA90)))
+#define DIEPDMA12   (*((const void* volatile*)(OTGBASE + 0xA94)))
+#define DIEPCTL13   (*((uint32_t volatile*)(OTGBASE + 0xAA0)))
+#define DIEPINT13   (*((uint32_t volatile*)(OTGBASE + 0xAA8)))
+#define DIEPTSIZ13  (*((uint32_t volatile*)(OTGBASE + 0xAB0)))
+#define DIEPDMA13   (*((const void* volatile*)(OTGBASE + 0xAB4)))
+#define DIEPCTL14   (*((uint32_t volatile*)(OTGBASE + 0xAC0)))
+#define DIEPINT14   (*((uint32_t volatile*)(OTGBASE + 0xAC8)))
+#define DIEPTSIZ14  (*((uint32_t volatile*)(OTGBASE + 0xAD0)))
+#define DIEPDMA14   (*((const void* volatile*)(OTGBASE + 0xAD4)))
+#define DIEPCTL15   (*((uint32_t volatile*)(OTGBASE + 0xAE0)))
+#define DIEPINT15   (*((uint32_t volatile*)(OTGBASE + 0xAE8)))
+#define DIEPTSIZ15  (*((uint32_t volatile*)(OTGBASE + 0xAF0)))
+#define DIEPDMA15   (*((const void* volatile*)(OTGBASE + 0xAF4)))
+#define DOEPDMA(x)  (*((void* volatile*)(OTGBASE + 0xB14 + 0x20 * (x))))
+#define DOEPCTL0    (*((uint32_t volatile*)(OTGBASE + 0xB00)))
+#define DOEPINT0    (*((uint32_t volatile*)(OTGBASE + 0xB08)))
+#define DOEPTSIZ0   (*((uint32_t volatile*)(OTGBASE + 0xB10)))
+#define DOEPDMA0    (*((void* volatile*)(OTGBASE + 0xB14)))
+#define DOEPCTL1    (*((uint32_t volatile*)(OTGBASE + 0xB20)))
+#define DOEPINT1    (*((uint32_t volatile*)(OTGBASE + 0xB28)))
+#define DOEPTSIZ1   (*((uint32_t volatile*)(OTGBASE + 0xB30)))
+#define DOEPDMA1    (*((void* volatile*)(OTGBASE + 0xB34)))
+#define DOEPCTL2    (*((uint32_t volatile*)(OTGBASE + 0xB40)))
+#define DOEPINT2    (*((uint32_t volatile*)(OTGBASE + 0xB48)))
+#define DOEPTSIZ2   (*((uint32_t volatile*)(OTGBASE + 0xB50)))
+#define DOEPDMA2    (*((void* volatile*)(OTGBASE + 0xB54)))
+#define DOEPCTL3    (*((uint32_t volatile*)(OTGBASE + 0xB60)))
+#define DOEPINT3    (*((uint32_t volatile*)(OTGBASE + 0xB68)))
+#define DOEPTSIZ3   (*((uint32_t volatile*)(OTGBASE + 0xB70)))
+#define DOEPDMA3    (*((void* volatile*)(OTGBASE + 0xB74)))
+#define DOEPCTL4    (*((uint32_t volatile*)(OTGBASE + 0xB80)))
+#define DOEPINT4    (*((uint32_t volatile*)(OTGBASE + 0xB88)))
+#define DOEPTSIZ4   (*((uint32_t volatile*)(OTGBASE + 0xB90)))
+#define DOEPDMA4    (*((void* volatile*)(OTGBASE + 0xB94)))
+#define DOEPCTL5    (*((uint32_t volatile*)(OTGBASE + 0xBA0)))
+#define DOEPINT5    (*((uint32_t volatile*)(OTGBASE + 0xBA8)))
+#define DOEPTSIZ5   (*((uint32_t volatile*)(OTGBASE + 0xBB0)))
+#define DOEPDMA5    (*((void* volatile*)(OTGBASE + 0xBB4)))
+#define DOEPCTL6    (*((uint32_t volatile*)(OTGBASE + 0xBC0)))
+#define DOEPINT6    (*((uint32_t volatile*)(OTGBASE + 0xBC8)))
+#define DOEPTSIZ6   (*((uint32_t volatile*)(OTGBASE + 0xBD0)))
+#define DOEPDMA6    (*((void* volatile*)(OTGBASE + 0xBD4)))
+#define DOEPCTL7    (*((uint32_t volatile*)(OTGBASE + 0xBE0)))
+#define DOEPINT7    (*((uint32_t volatile*)(OTGBASE + 0xBE8)))
+#define DOEPTSIZ7   (*((uint32_t volatile*)(OTGBASE + 0xBF0)))
+#define DOEPDMA7    (*((void* volatile*)(OTGBASE + 0xBF4)))
+#define DOEPCTL8    (*((uint32_t volatile*)(OTGBASE + 0xC00)))
+#define DOEPINT8    (*((uint32_t volatile*)(OTGBASE + 0xC08)))
+#define DOEPTSIZ8   (*((uint32_t volatile*)(OTGBASE + 0xC10)))
+#define DOEPDMA8    (*((void* volatile*)(OTGBASE + 0xC14)))
+#define DOEPCTL9    (*((uint32_t volatile*)(OTGBASE + 0xC20)))
+#define DOEPINT9    (*((uint32_t volatile*)(OTGBASE + 0xC28)))
+#define DOEPTSIZ9   (*((uint32_t volatile*)(OTGBASE + 0xC30)))
+#define DOEPDMA9    (*((void* volatile*)(OTGBASE + 0xC34)))
+#define DOEPCTL10   (*((uint32_t volatile*)(OTGBASE + 0xC40)))
+#define DOEPINT10   (*((uint32_t volatile*)(OTGBASE + 0xC48)))
+#define DOEPTSIZ10  (*((uint32_t volatile*)(OTGBASE + 0xC50)))
+#define DOEPDMA10   (*((void* volatile*)(OTGBASE + 0xC54)))
+#define DOEPCTL11   (*((uint32_t volatile*)(OTGBASE + 0xC60)))
+#define DOEPINT11   (*((uint32_t volatile*)(OTGBASE + 0xC68)))
+#define DOEPTSIZ11  (*((uint32_t volatile*)(OTGBASE + 0xC70)))
+#define DOEPDMA11   (*((void* volatile*)(OTGBASE + 0xC74)))
+#define DOEPCTL12   (*((uint32_t volatile*)(OTGBASE + 0xC80)))
+#define DOEPINT12   (*((uint32_t volatile*)(OTGBASE + 0xC88)))
+#define DOEPTSIZ12  (*((uint32_t volatile*)(OTGBASE + 0xC90)))
+#define DOEPDMA12   (*((void* volatile*)(OTGBASE + 0xC94)))
+#define DOEPCTL13   (*((uint32_t volatile*)(OTGBASE + 0xCA0)))
+#define DOEPINT13   (*((uint32_t volatile*)(OTGBASE + 0xCA8)))
+#define DOEPTSIZ13  (*((uint32_t volatile*)(OTGBASE + 0xCB0)))
+#define DOEPDMA13   (*((void* volatile*)(OTGBASE + 0xCB4)))
+#define DOEPCTL14   (*((uint32_t volatile*)(OTGBASE + 0xCC0)))
+#define DOEPINT14   (*((uint32_t volatile*)(OTGBASE + 0xCC8)))
+#define DOEPTSIZ14  (*((uint32_t volatile*)(OTGBASE + 0xCD0)))
+#define DOEPDMA14   (*((void* volatile*)(OTGBASE + 0xCD4)))
+#define DOEPCTL15   (*((uint32_t volatile*)(OTGBASE + 0xCE0)))
+#define DOEPINT15   (*((uint32_t volatile*)(OTGBASE + 0xCE8)))
+#define DOEPTSIZ15  (*((uint32_t volatile*)(OTGBASE + 0xCF0)))
+#define DOEPDMA15   (*((void* volatile*)(OTGBASE + 0xCF4)))
+
+
+
+
+#define DIEPCTL(x)  (*((uint32_t volatile*)(OTGBASE + 0x900 + 0x20 * (x))))
+/* Device Logical OUT Endpoint-Specific Registers */
+#define DOEPCTL(x)  (*((uint32_t volatile*)(OTGBASE + 0xB00 + 0x20 * (x))))
+/** Device IN Endpoint (ep) Transfer Size Register */
+#define DIEPTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0x910 + 0x20 * (x))))
+/** Device OUT Endpoint (ep) Transfer Size Register */
+#define DOEPTSIZ(x) (*((uint32_t volatile*)(OTGBASE + 0xB10 + 0x20 * (x))))
+#define DIEPINT(x)  (*((uint32_t volatile*)(OTGBASE + 0x908 + 0x20 * (x))))
+#define DOEPINT(x)  (*((uint32_t volatile*)(OTGBASE + 0xB08 + 0x20 * (x))))
+//#define DIEPDMA(x)  (*((const void* volatile*)(OTGBASE + 0x914 + 0x20 * (x)))
+//#define DOEPDMA(x)  (*((const void* volatile*)(OTGBASE + 0xB14 + 0x20 * (x)))
+
+
+
 #ifdef HAVE_USBSTACK
 #include "usb_ch9.h"
 #include "usb_core.h"
@@ -205,7 +371,7 @@
             {
                 if (epints & 1)  /* Transfer completed */
                 {
-                    invalidate_dcache();
+                    commit_discard_dcache();
                     int bytes = endpoints[i].size - (DIEPTSIZ(i) & 0x3FFFF);
                     if (endpoints[i].busy)
                     {
@@ -237,7 +403,7 @@
             {
                 if (epints & 1)  /* Transfer completed */
                 {
-                    invalidate_dcache();
+                    commit_discard_dcache();
                     int bytes = endpoints[i].size - (DOEPTSIZ(i) & 0x3FFFF);
                     if (endpoints[i].busy)
                     {
@@ -252,7 +418,7 @@
                     panicf("USB: AHB error on OUT EP%d", i);
                 if (epints & 8)  /* SETUP phase done */
                 {
-                    invalidate_dcache();
+                    commit_discard_dcache();
                     if (i == 0)
                     {
                         if (ctrlreq.header.bRequest == 5)
@@ -305,7 +471,7 @@
         DIEPTSIZ(ep) = length | (packets << 19);
         DIEPDMA(ep) = ptr;
     }
-    clean_dcache();
+    commit_dcache();
     DIEPCTL(ep) |= 0x84000000;  /* EPx OUT ENABLE CLEARNAK */
 }
 
@@ -327,7 +493,7 @@
         DOEPTSIZ(ep) = length | (packets << 19);
         DOEPDMA(ep) = ptr;
     }
-    clean_dcache();
+    commit_dcache();
     DOEPCTL(ep) |= 0x84000000;  /* EPx OUT ENABLE CLEARNAK */
 }