#3480450 - Pastie

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Ruby on Rails February 28, 2012
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diff --git a/bootloader/rk27xx.c b/bootloader/rk27xx.c
index b74526f..69f504c 100644
--- a/bootloader/rk27xx.c
+++ b/bootloader/rk27xx.c
@@ -1,184 +1,226 @@
-#include "config.h"
-#include <stdlib.h>
 #include <stdio.h>
-#include <string.h>
-#include "inttypes.h"
-#include "string.h"
-#include "cpu.h"
-#include "system.h"
+#include <system.h>
+#include <inttypes.h>
+#include "config.h"
+#include "gcc_extensions.h"
 #include "lcd.h"
-#include "kernel.h"
-#include "thread.h"
+#include "sysfont.h"
 #include "backlight.h"
-#include "backlight-target.h"
-#include "font.h"
+#include "button-target.h"
 #include "common.h"
-#include "version.h"
-
-// 441 Hz samples table, 44100 Hz and 441 Hz -> 100 samples 
-const int16_t samples[] = {
-         0,   2057,   4106,   6139,   8148,  10125,  12062,  13951,  15785,  17557,
-     19259,  20886,  22430,  23886,  25247,  26509,  27666,  28713,  29648,  30465,
-     31163,  31737,  32186,  32508,  32702,  32767,  32702,  32508,  32186,  31737,
-     31163,  30465,  29648,  28713,  27666,  26509,  25247,  23886,  22430,  20886,
-     19259,  17557,  15785,  13951,  12062,  10125,   8148,   6139,   4106,   2057,
-         0,  -2057,  -4106,  -6139,  -8148, -10125, -12062, -13951, -15785, -17557,
-    -19259, -20886, -22430, -23886, -25247, -26509, -27666, -28713, -29648, -30465,
-    -31163, -31737, -32186, -32508, -32702, -32767, -32702, -32508, -32186, -31737,
-    -31163, -30465, -29648, -28713, -27666, -26509, -25247, -23886, -22430, -20886,
-    -19259, -17557, -15785, -13951, -12062, -10125,  -8148,  -6139,  -4106,  -2057 };
+#include "storage.h"
+#include "disk.h"
+#include "panic.h"
+#include "power.h"
+#include "string.h"
+#include "file.h"
+
+#define DRAM_ORIG 0x60000000
+#define LOAD_SIZE 0x700000
+
+#define RKLD_MAGIC 0x4c44524b
+#define RKW_HEADER_CRC 0x40000000
+#define RKW_IMAGE_CRC 0x20000000
 
 extern void show_logo( void );
 
-void INT_HDMA(void)
+struct rkw_header_t {
+    uint32_t magic_number;    /* Magic number. 0x4C44524B */
+    uint32_t header_size;     /* Size of the header */
+    uint32_t image_base;      /* Base address of the firmware image */
+    uint32_t load_address;    /* Load address */
+    uint32_t load_limit;      /* End of the firmware image */
+    uint32_t bss_start;       /* This is the start of .bss section of the firmware I suppose */
+    uint32_t reserved0;       /* reserved - I've seen only zeros in this field so far */
+    uint32_t reserved1;       /* reserved - I've seen only zeros in this field so far */
+    uint32_t entry_point;     /* Entry point address */
+    uint32_t load_options;    /* 0x80000000 - setup flag (I don't know what it means 
+                               * but is present in every RKW I saw), 
+                               * 0x40000000 - check header crc, 
+                               * 0x20000000 - check firmware crc
+                               */
+    uint32_t crc;              /* crc32 of the header (excluding crc32 field itself) */
+};
+
+static uint32_t rkw_crc32(const void *src, uint32_t len)
 {
-#if 0
-//    static uint32_t i;
-//    printf("hdma int: %d", i++);
-
-    HDMA_ISRC0 = (uint32_t)&samples;
-    HDMA_IDST0 = (uint32_t)&I2S_TXR;
-    HDMA_ICNT0 = (sizeof(samples)/4) - 1;
-    HDMA_CON0 = (1<<22)|  // slice mode
-                (1<<21)|  // channel enable
-                (1<<18)|  // interrupt mode
-                (5<<13)|  // transfer mode inc8
-                (6<<9) |  // hdreq from i2s tx
-                (0<<7) |  // source address increment
-                (1<<5) |  // destination address fixed
-                (2<<3) |  // data size word
-                (1<<0);   // enable hardware triggered dma
-
-    HDMA_ISR = (1<<13) | // mask ch1 page overflow
-               (1<<11) | // mask ch1 page count down
-               (1<<9);   // mask ch1 interrupts
-#endif
-return;
+    const unsigned char *buf = (const unsigned char *)src;
+
+    /* polynomial 0x04c10db7 */
+    static const uint32_t crc32_lookup[16] =
+    {   /* lookup table for 4 bits at a time is affordable */
+        0x00000000, 0x04C10DB7, 0x09821B6E, 0x0D4316D9,
+        0x130436DC, 0x17C53B6B, 0x1A862DB2, 0x1E472005,
+        0x26086DB8, 0x22C9600F, 0x2F8A76D6, 0x2B4B7B61,
+        0x350C5B64, 0x31CD56D3, 0x3C8E400A, 0x384F4DBD
+    };
+
+    uint32_t crc32 = 0;
+    unsigned char byte;
+    uint32_t t;
+
+    while (len--)
+    {
+        byte = *buf++; /* get one byte of data */
+
+        /* upper nibble of our data */
+        t = crc32 >> 28; /* extract the 4 most significant bits */
+        t ^= byte >> 4; /* XOR in 4 bits of data into the extracted bits */
+        crc32 <<= 4; /* shift the CRC register left 4 bits */
+        crc32 ^= crc32_lookup[t]; /* do the table lookup and XOR the result */
+
+        /* lower nibble of our data */
+        t = crc32 >> 28; /* extract the 4 most significant bits */
+        t ^= byte & 0x0F; /* XOR in 4 bits of data into the extracted bits */
+        crc32 <<= 4; /* shift the CRC register left 4 bits */
+        crc32 ^= crc32_lookup[t]; /* do the table lookup and XOR the result */
+    }
+
+    return crc32;
 }
 
-static int codec_write(uint8_t reg, uint8_t data)
+/* based on load_firmware() */
+int load_rkw(unsigned char* buf, char* firmware, int buffer_size)
 {
-    uint8_t tmp = data;
-    return i2c_write(0x27<<1, reg<<1, 1, &tmp);
+    int fd;
+    int rc;
+    int len;
+    uint32_t crc, fw_crc;
+    char filename[MAX_PATH];
+    struct rkw_header_t rkw_info;
+
+    snprintf(filename,sizeof(filename), BOOTDIR "/%s",firmware);
+    fd = open(filename, O_RDONLY);
+
+    if(fd < 0)
+    {
+        snprintf(filename,sizeof(filename),"/%s",firmware);
+        fd = open(filename, O_RDONLY);
+        if(fd < 0)
+            return EFILE_NOT_FOUND;
+    }
+
+    rc = read(fd, &rkw_info, sizeof(rkw_info));
+    if (rc < (int)sizeof(rkw_info))
+        return -100; /* TODO introduce some meaningfull error code */
+
+    /* check if RKW is valid */
+    if (rkw_info.magic_number != RKLD_MAGIC)
+    {
+        printf("RKW invalid magic 0x%0x != 0x%0x", rkw_info.magic_number, RKLD_MAGIC);
+        return -101;
+    }
+
+    /* check header crc if present */
+    if (rkw_info.load_options & RKW_HEADER_CRC)
+    {
+        crc = rkw_crc32((uint8_t *)&rkw_info, sizeof(rkw_info)-sizeof(uint32_t));
+        if (rkw_info.crc != crc)
+        {
+            printf("RKW header CRC error 0x%0x != 0x%0x", rkw_info.crc, crc);
+            return -102;
+        }
+    }
+
+    /* check image size */
+    len = rkw_info.load_limit - rkw_info.load_address;
+    if (len > buffer_size)
+    {
+        printf("RKW image too big");
+        return EFILE_TOO_BIG;
+    }
+
+    /* check load address - we support loading only at 0x60000000 */
+    if (rkw_info.load_address != (uint32_t)buf)
+    {
+        printf("RKW unsupported load address");
+        return -103;
+    }
+
+    printf("Loading %s", firmware);
+
+    /* skip header */
+    lseek(fd, sizeof(rkw_info), SEEK_SET);
+
+    /* load image into buffer */
+    rc = read(fd, buf, len);
+
+    if(rc < len)
+    {
+        printf("RKW loading failed");
+        return EREAD_IMAGE_FAILED;
+    }
+
+
+    if (rkw_info.load_options & RKW_IMAGE_CRC)
+    {
+        rc = read(fd, &fw_crc, sizeof(uint32_t));
+
+        crc = rkw_crc32((uint8_t *)buf, len);
+
+        if (fw_crc != crc)
+        {
+            printf("RKW firmware CRC error 0x%0x != 0x%0x", fw_crc, crc);
+            return EBAD_CHKSUM;
+        }
+    }
+
+    close(fd);
+
+    return EOK;
 }
 
+void main(void) NORETURN_ATTR;
 void main(void)
 {
-    int i;
-
-    _backlight_init();
+    unsigned char* loadbuffer;
+    void(*kernel_entry)(void);
+    int ret;
 
     system_init();
     kernel_init();
     enable_irq();
 
-    lcd_init_device();
-    _backlight_on();
+    lcd_init();
+    backlight_init();
+    button_init_device();
+
     font_init();
-    lcd_setfont(FONT_SYSFIXED);
+    //lcd_setfont(FONT_SYSFIXED);
 
     show_logo();
-    sleep(HZ*2);
-
-printf("show logo passed");
-    // I2S init
-    SCU_CLKCFG &= ~((1<<17) | (1<<16)); // enable i2s, i2c pclk
-//SCU_CLKCFG |= ((1<<17) | (1<<16));
-    I2S_OPR = (1<<17) |    // reset Tx
-              (1<<16) |    // reset Rx
-              (1<<6)  |    // disable HDMA Req1
-              (1<<5);      // disable HDMA Req2
-
-    I2S_TXCTL = (1<<16) |  // LRCK/SCLK = 64
-                (4<<8)  |  // MCLK/SCK = 4
-                (1<<4)  |  // 16bit samples
-                (0<<3)  |  // stereo mode
-                (0<<1);    // I2S
- 
-    I2S_RXCTL = (1<<16) |  // LRCK/SCLK = 64
-                (4<<8)  |  // MCLK/SCK = 4
-                (1<<4)  |  // 16bit samples
-                (0<<3)  |  // stereo mode
-                (0<<1);    // I2S
-
-    I2S_FIFOSTS = (1<<18) |  // Tx int trigger half full
-                  (1<<16);   // Rx int trigger half full
-
-    // I2S start
-    I2S_OPR = (1<<17) | (1<<16);
-    sleep(HZ/100);
-
-    I2S_OPR = (0<<6) | // req channel 1 enable                               
-              (1<<5) | // req channel 2 disable
-              (0<<4) | // HDMA req channel 1 Tx
-              (0<<2) | // normal I2S operation (no loopback)
-              (1<<1);  // Tx start
-
-printf("I2S config passed");
-
-    HDMA_ISRC0 = (uint32_t)&samples;
-    HDMA_IDST0 = (uint32_t)&I2S_TXR;
-    HDMA_ICNT0 = (sizeof(samples)/4) - 1;
-    HDMA_ISCNT0 = 7;
-    HDMA_IPNCNTD0 = 1;
-    HDMA_CON0 = (1<<22)|  // slice mode
-                (1<<21)|  // channel enable
-                (1<<18)|  // interrupt mode
-                (5<<13)|  // transfer mode inc8
-                (6<<9) |  // hdreq from i2s tx
-                (0<<7) |  // source address increment
-                (1<<5) |  // destination address fixed
-                (2<<3) |  // data size word
-                (1<<0);   // enable hardware triggered dma
-
-    HDMA_ISR = (1<<13) | // mask ch1 page overflow
-               (1<<11) | // mask ch1 page count down
-               (1<<9);   // mask ch1 interrupts
-
-    INTC_IMR |= (1<<12);
-    INTC_IECR |= (1<<12);
-
-printf("HDMA config passed");
-
-    i2c_init();
-
-printf("I2C config passed");
-
-    // codec init
-    codec_write(0x00, (1<<3)|(1<<2)|(1<<1)|(1<<0)); // AICR
-    codec_write(0x01, (1<<7)|(1<<5)|(1<<3));        // CR1
-    codec_write(0x02, (1<<2));                      // CR2
-    codec_write(0x03, 0);                           // CCR1
-    codec_write(0x04, (2<<4)|(2<<0));               // CCR2
-    codec_write(0x07, (3<<5)|(3<<0));               // CCR
-
-
-    codec_write(0x0f, 0x1f|(2<<6));                 // CGR6
-    codec_write(0x14, (1<<1));                      // TR1
-    codec_write(0x05, (1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); // PMR1
-    sleep(HZ/100);
-
-    codec_write(0x06, (1<<3)|(1<<2)|(1<<0));               // PMR2
-
-
-    codec_write(0x05, (1<<6)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));        // PMR1
-    codec_write(0x05, (1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));               // PMR1
-
-
-    // DACout mode
-    codec_write(0x01, (1<<7)|(1<<3)|(1<<5)|(1<<4));  // CR1
-    codec_write(0x05, (1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); //PMR1
-//    codec_write(0x06, (1<<3)|(1<<2));                // PMR2
-
-printf("codec init passed");
-
-    codec_write(0x01, (1<<7)|(1<<3));         // CR1
-
-    codec_write(0x0a, 0); // 0dB digital gain
-    codec_write(0x11, 15|(2<<6)); // 
-
-    while(1)
-    {
-        printf("HDMA_CCNT0: 0x%0x FIFOSTS: 0x%0x", HDMA_CCNT0, I2S_FIFOSTS);
-    }
+
+    int btn = button_read_device();
+
+    if (btn)
+        lcd_clear_display();
+
+    ret = storage_init();
+    if(ret < 0)
+        error(EATA, ret, true);
+
+    while(!disk_init(IF_MV(0)))
+        panicf("disk_init failed!");
+
+    while((ret = disk_mount_all()) <= 0)
+        error(EDISK, ret, true);
+
+    printf("Loading firmware");
+    loadbuffer = (unsigned char*)DRAM_ORIG; /* DRAM */
+    
+//    while((ret = load_firmware(loadbuffer, BOOTFILE, LOAD_SIZE)) < 0)
+//        error(EBOOTFILE, ret, true);
+
+    while((ret = load_rkw(loadbuffer, "rockbox.rkw", LOAD_SIZE)) < 0)
+        error(EBOOTFILE, ret, true);
+
+    kernel_entry = (void*) loadbuffer;
+    commit_discard_idcache();
+    printf("Executing");
+    kernel_entry();
+
+    printf("ERR: Failed to boot");
+
+    /* hang */
+    while(1);
 }
diff --git a/firmware/export/config/rk27generic.h b/firmware/export/config/rk27generic.h
index 5944a82..cdd103e 100644
--- a/firmware/export/config/rk27generic.h
+++ b/firmware/export/config/rk27generic.h
@@ -3,7 +3,7 @@
  */
 
 /* For Rolo and boot loader */
-#define MODEL_NUMBER 78
+#define MODEL_NUMBER 73
 
 #define MODEL_NAME   "Rockchip 27xx generic"
 
diff --git a/firmware/target/arm/rk27xx/app.lds b/firmware/target/arm/rk27xx/app.lds
index 080c74f..d3f5268 100644
--- a/firmware/target/arm/rk27xx/app.lds
+++ b/firmware/target/arm/rk27xx/app.lds
@@ -37,8 +37,8 @@ SECTIONS
 
   .intvect : {
     _intvectstart = . ;
-    *(.intvect)
-    _intvectend = _newstart ;  
+    KEEP(*(.intvect))
+    _intvectend = . ;  
   } > IRAM AT > DRAM
   _intvectcopy = LOADADDR(.intvect) ;
 
diff --git a/firmware/target/arm/rk27xx/boot.lds b/firmware/target/arm/rk27xx/boot.lds
index b7bc9be..03766f3 100644
--- a/firmware/target/arm/rk27xx/boot.lds
+++ b/firmware/target/arm/rk27xx/boot.lds
@@ -12,36 +12,46 @@ STARTUP(target/arm/rk27xx/crt0.o)
 #define DRAMORIG 0x60000000
 #define DRAMSIZE (MEMORYSIZE * 0x100000)
 
+#define RUN_OFFSET 0x700000
+#define DRAM_RUN_ORIG (DRAMORIG + RUN_OFFSET)
+#define DRAM_RUN_SIZE (DRAMSIZE - RUN_OFFSET)
+
 #define IRAMORIG 0x00000000
 #define IRAMSIZE 4K
 
 MEMORY
 {
     DRAM  : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
+    DRAM_RUN : ORIGIN = DRAM_RUN_ORIG, LENGTH = DRAM_RUN_SIZE
     IRAM  : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
 }
 
 SECTIONS
 {
+  .bootloader_reloc : {
+    *(.bootloader_reloc)
+  } > DRAM
+
   .intvect : {
     _intvectstart = . ;
-    *(.intvect)
-    _intvectend = _newstart ;  
+    KEEP(*(.intvect))
+    _intvectend = . ;  
   } > IRAM AT > DRAM
   _intvectcopy = LOADADDR(.intvect) ;
 
   .text : {
+    _relocstart = .;
     *(.init.text)
     *(.text*)
     *(.glue_7*)
-  } > DRAM
+  } > DRAM_RUN AT > DRAM 
 
   .data : {
     *(.rodata*)
     *(.data*)
     *(.ncdata*);
     . = ALIGN(0x4);
-  } > DRAM
+  } > DRAM_RUN AT > DRAM
 
   .idata : {
     _datastart = . ;
@@ -50,7 +60,7 @@ SECTIONS
     *(.idata)
     . = ALIGN(0x4);
     _dataend = . ;
-   } > DRAM
+   } > DRAM_RUN AT > DRAM
    _datacopy = LOADADDR(.idata) ;
 
   .stack (NOLOAD) :
@@ -67,7 +77,7 @@ SECTIONS
      _fiqstackbegin = .;
      . += 0x400;
      _fiqstackend = .;
-  } > DRAM
+  } > DRAM_RUN AT > DRAM
 
   .bss (NOLOAD) : {
      _edata = .;
@@ -77,5 +87,7 @@ SECTIONS
      *(COMMON);
     . = ALIGN(0x4);
      _end = .;
-  } > DRAM
+     _relocend = .;
+  } > DRAM_RUN AT > DRAM
+  _reloccopy = LOADADDR(.text) ;
 }
diff --git a/firmware/target/arm/rk27xx/crt0.S b/firmware/target/arm/rk27xx/crt0.S
index 23f3fcf..9d9b5f3 100644
--- a/firmware/target/arm/rk27xx/crt0.S
+++ b/firmware/target/arm/rk27xx/crt0.S
@@ -24,12 +24,36 @@
 #include "config.h"
 #include "cpu.h"
 
+    .global start
+    .global _newstart
+#ifdef BOOTLOADER
+    .section .bootloader_reloc,"ax",%progbits
+start:
+    msr     cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
+
+    /* setup caches */
+    ldr     r0, =0xefff0000    /* cache controler base address */
+    ldrh    r1, [r0]
+    strh    r1, [r0]          /* global cache disable */
+
+    ldr     r2, =_relocstart
+    ldr     r3, =_relocend
+    ldr     r4, =_reloccopy
+1:
+    cmp     r3, r2
+    ldrhi   r1, [r4], #4
+    strhi   r1, [r2], #4
+    bhi     1b
+    ldr     pc, =_newstart
+    .ltorg
+#endif
+
     .section .intvect,"ax",%progbits
-    .global    start
-    .global    _newstart
     /* Exception vectors */
+#ifndef BOOTLOADER
 start:
-    b _newstart
+#endif
+    ldr pc, =_newstart
     ldr pc, =undef_instr_handler
     ldr pc, =software_int_handler
     ldr pc, =prefetch_abort_handler
@@ -38,12 +62,10 @@ start:
     ldr pc, =irq_handler
     ldr pc, =fiq_handler
     .ltorg
-_newstart:
-    ldr pc, =newstart2
+
     .section .init.text,"ax",%progbits
-newstart2:
+_newstart:
     msr     cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
-
     mov     r0, #0x18000000
     add     r0, r0, #0x1c000
 
@@ -184,7 +206,6 @@ newstart2:
     strhi   r3, [r2], #4
     bhi     1b
 
-
     bl      main
 
     .text
diff --git a/utils/rk27utils/rk27load/Makefile b/utils/rk27utils/rk27load/Makefile
index f777e76..9bc9301 100644
--- a/utils/rk27utils/rk27load/Makefile
+++ b/utils/rk27utils/rk27load/Makefile
@@ -1,7 +1,7 @@
 all: rk27load
 
 rk27load: main.c scramble.c checksum.c common.c stage1_upload.c stage2_upload.c stage3_upload.c
-  gcc -g -std=c99 -o $@ -W -Wall -lusb-1.0 -I/usr/include/libusb-1.0/ $^
+  gcc -g -std=c99 -o $@ -W -Wall -I/usr/include/libusb-1.0/ $^ -lusb-1.0
 
 clean:
   rm -fr *.o rk27load
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