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GHWCFG1-4

0x00002664 = 10 01 10 01 10 01 00
            0 bidir
            1 3 5 in
            2 4 6 out

0x228DD850 = 1000 10 10 00 1 1 0111 0110 00 01 0 10 000
            otg mode HNP & SRP capable
            arch = internal DMA
            multi point application
            UTMI+
            full speed interface not supported
            6 endpoints
            8 host channels
            periodic OUT channels supported in host mode
            dynamic fifo sizing enabled
            Non-Periodic Request Queue Depth 8
            Host Mode Periodic Request Queue Depth 8
            Device Mode IN Token Sequence Learning Queue Depth 8

0x0535 00E8 = 10100110101 000 0 0 0 0 0 1 110 1000
            width of transfer size counters = 19 bits
            width of packet size counters = 10 bits
            OTG capable
            i2c interafce NOT available
            vendor control interface NOT available
            optional feature = 0 (possibly not availabe)
            asynchronous reset is used in the core
            AHB and PHY asynchronous
            FIFO depth = 1333 32-bit words

0x0FF08030 = 11 1 1 1 1 1 1 0000 10 00000000 1 1 0000
            device mode periodic IN endpoints = 0
            power optimization = yes
            minimum AHB freq less than 60MHz  yes
            phy data width = 8/16 bits (software selectable)
            num ctl eps = 0 (only ep0)
            iddig / vbus_valid / a_valid / b_valid / session_end filters enabled