Thank you to anyone who has already donated - your generous donations helped make three months of treatment possible.
My brother Nate continues to fight stage IV Hodgkin's lymphoma. He's just 31, with a wife and baby girl. They have no active income (since he's been unable to return to work), no insurance, and cannot afford the treatment he needs. Nate and his family need your help. Please consider a donation, every dollar helps. Thanks.
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diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index 7c388ad..cec8929 100644 #define AS3525_FCLK_SEL AS3525_CLK_PLLA #define AS3525_FCLK_POSTDIV (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), AS3525_FCLK_FREQ) - 1) /*div=1/(n+1)*/ -#if CONFIG_CPU == AS3525v2 -/* On as3525v2 we change fclk by writing to CGU_PROC */ #define AS3525_FCLK_POSTDIV_UNBOOSTED (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), CPUFREQ_NORMAL) - 1) /*div=1/(n+1) */ + +#if CONFIG_CPU == AS3525v2 /* Since pclk is based on fclk, we need to change CGU_PERI as well */ #define AS3525_PCLK_DIV0_UNBOOSTED (CLK_DIV(CPUFREQ_NORMAL, AS3525_DRAM_FREQ) - 1) /*div=1/(n+1)*/ #endif /* CONFIG_CPU == AS3525v2 */ diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 50ce697..8e6ab25 100644 void system_init(void) #endif AS3525_PCLK_SEL); -#if CONFIG_CPU == AS3525 - cpu_frequency = CPUFREQ_DEFAULT; /* fastbus */ -#else - cpu_frequency = CPUFREQ_MAX; -#endif + set_cpu_frequency(CPUFREQ_DEFAULT); #if 0 /* the GPIO clock is already enabled by the dualboot function */ CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; void udelay(unsigned usecs) #if CONFIG_CPU == AS3525 void set_cpu_frequency(long frequency) { + asm volatile( + "mrc p15, 0, r0, c1, c0 \n" + "bic r0, r0, #3<<30 \n" /* fastbus clocking */ + "mcr p15, 0, r0, c1, c0 \n" + : : : "r0" ); + if(frequency == CPUFREQ_MAX) { -#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE - /* Increasing frequency so boost voltage before change */ - ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20)); - - /* Some players run a bit low so use 1.175 volts instead of 1.20 */ - /* Wait for voltage to be at least 1.175v before making fclk > 200 MHz */ - while(adc_read(ADC_CVDD) < 470); /* 470 * .0025 = 1.175V */ -#endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ - - asm volatile( - "mrc p15, 0, r0, c1, c0 \n" - -#ifdef ASYNCHRONOUS_BUS - "orr r0, r0, #3<<30 \n" /* asynchronous bus clocking */ -#else - "bic r0, r0, #3<<30 \n" /* clear bus bits */ - "orr r0, r0, #1<<30 \n" /* synchronous bus clocking */ -#endif - - "mcr p15, 0, r0, c1, c0 \n" - : : : "r0" ); + CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | + (AS3525_FCLK_PREDIV << 2) | + AS3525_FCLK_SEL); cpu_frequency = CPUFREQ_MAX; } else { - asm volatile( - "mrc p15, 0, r0, c1, c0 \n" - "bic r0, r0, #3<<30 \n" /* fastbus clocking */ - "mcr p15, 0, r0, c1, c0 \n" - : : : "r0" ); - - -#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE - /* Decreasing frequency so reduce voltage after change */ - ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10)); -#endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */ + CGU_PROC = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) | + (AS3525_FCLK_PREDIV << 2) | + AS3525_FCLK_SEL); cpu_frequency = CPUFREQ_NORMAL; } + + asm volatile( + "mrc p15, 0, r0, c1, c0 \n" + "bic r0, r0, #3<<30 \n" /* clear bus bits */ + "orr r0, r0, #1<<30 \n" /* synchronous bus clocking */ + "mcr p15, 0, r0, c1, c0 \n" + : : : "r0" ); } #else /* as3525v2 */ /* FIXME : disabled for now, seems to cause buggy memory accesses |
