Thank you to anyone who has already donated - your generous donations helped make three months of treatment possible.
My brother Nate continues to fight stage IV Hodgkin's lymphoma. He's just 31, with a wife and baby girl. They have no active income (since he's been unable to return to work), no insurance, and cannot afford the treatment he needs. Nate and his family need your help. Please consider a donation, every dollar helps. Thanks.
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const char *part_probes[] = { "cmdlinepart", NULL }; #endif +//NIRV START + +#define CONFIG_NAND_LF1000_P0_SIZE 0x00020000 +#define CONFIG_NAND_LF1000_P1_SIZE 0x000E0000 +#define CONFIG_NAND_LF1000_P2_SIZE 0x00100000 +#define CONFIG_NAND_LF1000_P3_SIZE 0x00200000 +#define CONFIG_NAND_LF1000_P4_SIZE 0x00E00000 +#define CONFIG_NAND_LF1000_P5_SIZE 0x00200000 +#define CONFIG_NAND_LF1000_P6_SIZE 0x00E00000 +#define CONFIG_NAND_LF1000_P7_SIZE 0x0DE00000 + + +/* + * Define partitions for flash devices + */ + +#if defined (CONFIG_MACH_ME_MP2530F) +#define LF_ERASE_BLK 0x4000 +#else /* All other boards have big erase blocks */ -/* TODO: FIXME: when MLC NAND is used, this ought to be 0x40000 */ -#define LF_ERASE_BLK 0x40000 +#define LF_ERASE_BLK 0x20000 +#endif /* Just shortening the names for clearer code */ #define LF_P0 (CONFIG_NAND_LF1000_P0_SIZE) #define LF_P2 (CONFIG_NAND_LF1000_P2_SIZE) #define LF_P3 (CONFIG_NAND_LF1000_P3_SIZE) #define LF_P4 (CONFIG_NAND_LF1000_P4_SIZE) +#define LF_P5 (CONFIG_NAND_LF1000_P5_SIZE) +#define LF_P6 (CONFIG_NAND_LF1000_P6_SIZE) +#define LF_P7 (CONFIG_NAND_LF1000_P7_SIZE) + +#if ((LF_P0 % LF_ERASE_BLK) || (LF_P1 % LF_ERASE_BLK) || \ + (LF_P2 % LF_ERASE_BLK) || (LF_P3 % LF_ERASE_BLK) || \ + (LF_P4 % LF_ERASE_BLK) || (LF_P5 % LF_ERASE_BLK) || \ + (LF_P6 % LF_ERASE_BLK) || (LF_P7 % LF_ERASE_BLK)) +#error "NAND partitions must be multiple of erase block." +#endif + +static struct mtd_partition partition_info[] = { + { .name = "LF1000_uniboot", + .offset = 0, + .size = LF_P0}, + { .name = "Atomic_Boot_Flags", + .offset = LF_P0, + .size = LF_P1 }, + { .name = "Manufacturing_Data", + .offset = LF_P0 + LF_P1, + .size = LF_P2}, + { .name = "Kernel0", + .offset = LF_P0 + LF_P1 + LF_P2, + .size = LF_P3 }, + { .name = "Linux_RFS0", + .offset = LF_P0 + LF_P1 + LF_P2 + LF_P3, + .size = LF_P4 }, + { .name = "Kernel1", + .offset = LF_P0 + LF_P1 + LF_P2 + LF_P3 + LF_P4, + .size = LF_P5 }, + { .name = "Linux_RFS1", + .offset = LF_P0 + LF_P1 + LF_P2 + LF_P3 + LF_P4 + LF_P5, + .size = LF_P6 }, + { .name = "Brio", + .offset = LF_P0 + LF_P1 + LF_P2 + LF_P3 + LF_P4 + LF_P5 + LF_P6, + .size = LF_P7 }, + { .name = "EXT", + .offset = LF_P0 + LF_P1 + LF_P2 + LF_P3 + LF_P4 + LF_P5 + LF_P6 + LF_P7, + .size = MTDPART_SIZ_FULL }, +}; + +static struct mtd_partition partition_info_cart[] = { + { .name = "Cartridge", + .offset = 0, + .size = MTDPART_SIZ_FULL }, +}; + +#undef LF_P0 +#undef LF_P1 +#undef LF_P2 +#undef LF_P3 +#undef LF_P4 +#undef LF_P5 +#undef LF_P6 +#undef LF_P7 +#undef LF_ERASE_BLK + +//NIRV-END + +/* All other boards have big erase blocks */ +/* TODO: FIXME: when MLC NAND is used, this ought to be 0x40000 */ + +//#define LF_ERASE_BLK 0x40000 + +/* Just shortening the names for clearer code */ +/*#define LF_P0 (CONFIG_NAND_LF1000_P0_SIZE) +#define LF_P1 (CONFIG_NAND_LF1000_P1_SIZE) +#define LF_P2 (CONFIG_NAND_LF1000_P2_SIZE) +#define LF_P3 (CONFIG_NAND_LF1000_P3_SIZE) +#define LF_P4 (CONFIG_NAND_LF1000_P4_SIZE) #if ((LF_P0 % LF_ERASE_BLK) || (LF_P1 % LF_ERASE_BLK) || \ (LF_P2 % LF_ERASE_BLK) || (LF_P3 % LF_ERASE_BLK) || \ #undef LF_P3 #undef LF_P4 #undef LF_ERASE_BLK +*/ + + + + + + /* Ask gpio driver, which sampled this at boot time. */ static u8 get_cart_type(void) if (base_parts_nb == 0) { if (gpio_get_boot_source_config() == SCRATCH_BOOT_SOURCE_USB) { - base_parts = partition_info_recovery; - base_parts_nb = ARRAY_SIZE(partition_info_recovery); + // base_parts = partition_info_recovery; + // base_parts_nb = ARRAY_SIZE(partition_info_recovery); } else { |
